Huawei unveils chip design to reach 1.4nm process

[404]

Huawei has unveiled a roadmap to achieve transistor performance equivalent to a 1.4nm density by 2031 without relying on extreme ultraviolet (EUV) lithography machines

 

[Eisenhut]

Huawei has unveiled a roadmap to achieve transistor performance equivalent to a 1.4nm density by 2031 without relying on extreme ultraviolet (EUV) lithography machines

Joker la...talk so much, do first la

 

[laksaboy]

China should stop its delulu fantasies about becoming a world leader in tech and grow more food... if it values its future well being.

 

[syed putra]

Why stop at 1.4nm?

 

[Truthspeak]

Huawei has unveiled a roadmap to achieve transistor performance equivalent to a 1.4nm density by 2031 without relying on extreme ultraviolet (EUV) lithography machines

It is just a marketing campaign that they reduce the size to 1.4 “nanometer”. Please don’t take it seriously that it really has the density of 1.4 nm

Naive people would believe everything they read from the internet particularly the mainstream content somehow

Similarly, like the people who thinks space rockets would really went to outer space without any scientific verification

 

[superpower]

HUAWEI Presents the Tau (τ) Scaling Law, Enabling Breakthroughs in Transistor Density and System Performance​

Today, at the 2026 IEEE International Symposium on Circuits and Systems (ISCAS), He Tingbo from HUAWEI delivered a keynote speech titled "New Semiconductor Path in Practice". In her speech, she presented the Tau (τ) Scaling Law, a new principle for guiding the future development of the semiconductor industry. This law proposes replacing geometric scaling with time (τ) scaling as a new guiding principle for the evolution of both semiconductors and electronic systems. Based on this principle, innovative technologies such as LogicFolding can be used to continuously compress signal propagation delay and steadily improve transistor density, which will drive the ongoing evolution of semiconductors and electronic systems.

In recent years, Moore's Law – which has guided the semiconductor industry for more than five decades – has faced severe physical limits and diminishing economic returns. The global industry has been increasingly constrained by the slowdown in the geometric scaling of transistors and the erosion of cost-per-transistor benefits. The industry must now tackle the urgent and common challenge of overcoming the physical constraints of traditional processes and finding a new, sustainable evolution path that can match surging computing demands. This is where the τ Scaling Law comes into play.

Based on this law, HUAWEI has developed innovative core technologies like LogicFolding and established a multi-level co-optimization mechanism that spans semiconductor devices, circuits, chips, and systems. This mechanism aims to systematically shorten the time constant τ in order to drive up performance, energy efficiency, and transistor density at each level in the following ways:

• At the device level: Optimizing the resistance and parasitic capacitance of transistors and interconnects to minimize the device-level time constant τ at the underlying physical layer
• At the circuit level: Adopting the LogicFolding architecture to break down the physical boundaries of traditional circuit layouts, significantly shortening critical-path wiring, effectively reducing the resistive and capacitive load of signal propagation, and ultimately boosting transistor density and circuit performance
• At the chip level: Employing full-stack coordinated design of software, architecture, and silicon to achieve fine-grained, workload-driven control over instruction and data flows, enhancing system-level parallelism and efficiency, and significantly reducing end-to-end execution time
• At the system level: Redefining interconnect protocols for computing systems with UnifiedBus to achieve unified memory addressing and native memory semantics for SuperPoDs, significantly reducing system communications latency

 

[Truthspeak]

HUAWEI Presents the Tau (τ) Scaling Law, Enabling Breakthroughs in Transistor Density and System Performance​

Today, at the 2026 IEEE International Symposium on Circuits and Systems (ISCAS), He Tingbo from HUAWEI delivered a keynote speech titled "New Semiconductor Path in Practice". In her speech, she presented the Tau (τ) Scaling Law, a new principle for guiding the future development of the semiconductor industry. This law proposes replacing geometric scaling with time (τ) scaling as a new guiding principle for the evolution of both semiconductors and electronic systems. Based on this principle, innovative technologies such as LogicFolding can be used to continuously compress signal propagation delay and steadily improve transistor density, which will drive the ongoing evolution of semiconductors and electronic systems.

In recent years, Moore's Law – which has guided the semiconductor industry for more than five decades – has faced severe physical limits and diminishing economic returns. The global industry has been increasingly constrained by the slowdown in the geometric scaling of transistors and the erosion of cost-per-transistor benefits. The industry must now tackle the urgent and common challenge of overcoming the physical constraints of traditional processes and finding a new, sustainable evolution path that can match surging computing demands. This is where the τ Scaling Law comes into play.

Based on this law, HUAWEI has developed innovative core technologies like LogicFolding and established a multi-level co-optimization mechanism that spans semiconductor devices, circuits, chips, and systems. This mechanism aims to systematically shorten the time constant τ in order to drive up performance, energy efficiency, and transistor density at each level in the following ways:

• At the device level: Optimizing the resistance and parasitic capacitance of transistors and interconnects to minimize the device-level time constant τ at the underlying physical layer
• At the circuit level: Adopting the LogicFolding architecture to break down the physical boundaries of traditional circuit layouts, significantly shortening critical-path wiring, effectively reducing the resistive and capacitive load of signal propagation, and ultimately boosting transistor density and circuit performance
• At the chip level: Employing full-stack coordinated design of software, architecture, and silicon to achieve fine-grained, workload-driven control over instruction and data flows, enhancing system-level parallelism and efficiency, and significantly reducing end-to-end execution time
• At the system level: Redefining interconnect protocols for computing systems with UnifiedBus to achieve unified memory addressing and native memory semantics for SuperPoDs, significantly reducing system communications latency

Sheeple would take these as scientific proof of something but as you know, these aren’t proof of anything

These are “made to believe”

Fake science had no scientific evidence but only presentation slides to con audience

 

[Boonsiong]

where can I buy Huawei phone in Singapore ?

 

[404]

Huawei has confirmed it will introduce a new flagship phone series featuring its most advanced chipset to date in fall 2026. The flagship lineup is expected to debut in September or October 2026. This technology uses a dual-layer stacking design to boost transistor density, theoretically rivaling the performance of global 3nm process nodes.

 

[Eisenhut]

Stacking sial!!!! Stacking but can it cool???

 

[syed putra]

Stacking sial!!!! Stacking but can it cool???

You are outdated

China Is Putting Data Centers in the Ocean to Keep Them Cool​

China is pulling ahead of the rest of the world in sinking data centers that power AI into the ocean as an alternate way to keep them cool
By You Xiaoying edited by Andrea Thompson

The underwater data center pictured here was a pilot project off the coast of Hainan. Another, more advanced, one is now being built off Shanghai.

Shanghai Hailanyun Technology
Artificial Intelligence
To grow its economy, China is betting big on artificial intelligence, cloud computing and other digital technology—and a big part of that bet involves rapidly building data centers to boost computing power. But these massive collections of servers gobble up growing amounts of energy, and each one cycles through hundreds of thousands of gallons of water a day to carry away the heat they generate.

 

[Eisenhut]

You are outdated

China Is Putting Data Centers in the Ocean to Keep Them Cool​

China is pulling ahead of the rest of the world in sinking data centers that power AI into the ocean as an alternate way to keep them cool
By You Xiaoying edited by Andrea Thompson

The underwater data center pictured here was a pilot project off the coast of Hainan. Another, more advanced, one is now being built off Shanghai.

Shanghai Hailanyun Technology
Artificial Intelligence
To grow its economy, China is betting big on artificial intelligence, cloud computing and other digital technology—and a big part of that bet involves rapidly building data centers to boost computing power. But these massive collections of servers gobble up growing amounts of energy, and each one cycles through hundreds of thousands of gallons of water a day to carry away the heat they generate.

This is reason why AMDK cannot agree with China, China has no respect for marine life and global warming

 

[syed putra]

This is reason why AMDK cannot agree with China, China has no respect for marine life and global warming

All Those days centres spewing out millions of tons of co2 a day.
There is one planned as big as Manhattan but only employ few thousand workers. Compared to. Manhattan which employ millions.